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www.maxim - ic.com/AN649 page 1 of 11 fiber optic circuits application note 649: jun 28, 2000 hfta - 04.0: optical/electrical conversion in sdh/sonet fiber optic systems this article explains the basic functions and design challe nges of the optical to electrical and electrical to optical signal conversion in sdh/sonet fiber optic receivers and transmitters. a complete chip set solution to develop the electronic part of oc 12/stm 4 receivers and transmitters is presented. the adve nt of cheaper and more powerful personal computers has not only expanded the user base; it is also creating a demand for greater transmission capacity among the telecom networks by adding an increasing volume of internet and videophone connections to the t raditional phone and fax services. the following discussion of an oc 12/stm 4 receiver/transmitter chipset supports these developments and includes a description of the electronic components required for optic/electric (o/e) conversion in sdh/sonet fiber o ptic transmission systems. competition among network providers enables the multimedia market to grow, and the introduction of new and improved products and services in the near future should strengthen the demand for increased transmission capacity. this n eed for more data throughput can be satisfied economically with fiber optic (fo) cables because the transmission capacity is potentially very high (versus that of copper wires). the physical nature of the fiber cable lets providers expand capacity by incre asing the transmission bit rate or by introducing alternative transmission techniques, without the need for further upgrades or additional cable installations. these advantages have led many countries to build extensive fiber networks, and further expansio n of these networks can be expected. to transmit optical data via fiber cables, signals must be converted from electrical to optical at the transmit end, and then converted back to electrical at the receive end. these necessary conversions are handled by r eceiver/transmitter units that contain electronic devices along with the optical components. fo transceivers the widely used time division multiplex (tdm) transmission technique now enables bit rates up to 10gbps and is well established in modern transport systems. today's high - speed fiber optic transmission systems offer the following standard bit rates:
www.maxim - ic.com/AN649 page 2 of 11 new techniques such as wavelength division multiplexing (w dm) further increase the transmission capacity by sending numerous time - multiplexed data streams over one fiber, using a different wavelength for each data stream. electronic components in a wdm receiver and transmitter (compared with those in a tdm system ) differ according to the behavior of the optical sources and line amplifiers in the wdm transport system. the following section describes the performance required for receivers and transmitters in an optical tdm transmission system. optical receivers opti cal receivers detect optical signals from the fiber and convert them to electrical signals, which must then be amplified before their data waveforms and clock can be recovered. a serial - to - parallel conversion of the data stream may be necessary, depending on the bit rate and the system - specific setup of the following cmos functions. figure 1 shows how the receiver's output interface provides regenerated data in a serial or parallel bit stream, along with the recovered clock. figure 1. a typical receiver/transmitter unit for sonet/sdh fiber - transmission systems.
www.maxim - ic.com/AN649 page 3 of 11 a pin or apd (avalanche photodiode) photodetector converts the received light to a signal current. the pin diode is relatively cheap and operates with the same supply voltage as the electronic components, but for a given optical power it generates fewer electrons than the apd. as a result, the apd provides a more sensitive receiver that can be placed farth er away from the transmitter. this advantage is offset by the need for an apd bias circuit, which (depending on the apd type) must provide a reverse operating voltage in the 30v to 100v range. additionally, the apd adds more noise, costs more, and requires cooling. the photodetector delivers the extracted current to a transimpedance amplifier (tia), which first converts the current to a voltage. this single - ended voltage is then amplified by the tia and (usually) converted to a differential signal as requir ed by state - of - the - art receivers. the tia should provide both high overload tolerance and high input sensitivity (i.e., a large dynamic range). to provide the high input sensitivity necessary to receive optical signals weakened by transmitter aging or long transmission distance (or both), the tia noise must be reduced to a minimum. on the other hand, a high overload tolerance is required to avoid bit errors due to distortion in the presence of strong optical signals. further, the tia's maximum achievable ga in depends on the operating frequency. to ensure stable operation and the required bandwidth, gain can be optimized only within a narrow range. this limitation may cause the output voltage resulting from low - power optical signals to be insufficient for fur ther processing. to amplify small tia voltages in the 1mv to 2mv range, the tia function must be followed by a postamplifier, which in most cases is a limiting amplifier (la). as the name implies, a limiting amplifier delivers a certain output - voltage swin g whose maximum is independent of the input signal strength. also included is a loss - of - power indicator (lop) that warns when the incoming signal falls below a user - defined threshold. as a system - dependent parameter, this threshold must be adjusted externa lly. a comparator with hysteresis ensures chatter - free operation for the lop flag when the signal is close to the threshold level. a key component that follows the limiting amplifier in a receiver unit is the clock and data recovery (cdr) circuit. the cdr performs timing and amplitude - level decisions on the incoming signal, which leads to a time - and amplitude - regenerated data stream. first to be recovered from the received signal is the clock. several possibilities can support this clock - recovery function (external saw filter, external reference clock, etc.), but only the fully integrated approach can save both cost and effort. the challenge for an integrated clock - recovery circuit is to meet the jitter specification recommended by the international telecom munication union - telecom standards sector (itu - t). jitter refers to the effect in which individual bit transitions ("0" to "1" and vice - versa) are not exactly in phase. the effect becomes visual in an "eye diagram," in which several pseudo - random bit - patte rn sequences are superimposed. an eye diagram illustrates the quality of a data stream in terms of the eye opening, measured using the "eye mask" ( figure 2 ).
www.maxim - ic.com/AN649 page 4 of 11 fi gure 2. an "eye diagram" illustrates the signal quality of a data stream. itu - t recommendations specify limits on the tolerance, transfer, and generation of jitter. signal quality at the la output (as represented by the eye opening) is usually low, mostl y as a consequence of nonideal components in the optical transmission system. because the cdr must accept a certain amount of input data jitter to achieve normal error - free operation, all receiver units in line - termination and regenerator applications must comply with the itu - t recommendations for jitter tolerance. jitter transfer refers to the portion of jitter allowed to transfer from input to output of the cdr, and jitter generation is that produced by the cdr itself. the itu - t specs for these two parame ters must be met for regenerators in a long - haul system, because at each stage the recovered clock enables transmission to the next regenerator, allowing jitter contributions to accumulate from regenerator to regenerator. conversely, for line - termination r eceivers (which are in the majority of applications) the jitter transfer and jitter generation need not meet itu - t recommendations. in those applications, the regenerated data is synchronized to the system clock. aside from jitter effects, noise and pulse distortion both reduce the phase margin in which received bits can be clocked for the purpose of sensing their logic level. the use of a phase - locked loop (pll) is essential in synchronizing the clock with the data stream, to ensure alignment of the clock with the middle of a data word. to further optimize the bit error rate (ber) in the presence of asymmetrical rise and fall transitions of the received data signal, the system should include an option to adjust the phase relation between clock and data. the cdr often includes a loss - of - lock (lol) alarm, which monitors whether the pll is locked to the received data stream. the cdr's serial stream of regenerated data and the recovered clock signal are usually fed to a deserializer, whose conversion ratio depen ds on the data's bit rate and the interface capability (speed) of the cmos system components. the
www.maxim - ic.com/AN649 page 5 of 11 deserializer must also provide a cmos - compatible interface. to support bit alignment of the serial data stream to the different deserializer outputs, the dese rializer should include bit - synchronization capability. optical transmitter the optical transmitter in a fiber optic system converts the electrical bit sequence delivered from the cmos system components to an optical data stream. as shown in figure 1, it contains a serializer with clock synthesizer (which depends on the system setup and transmission bit rate), a driver, and an optical source. two important wavelength ranges (windows 2 and 3) are in use for transmitting information over a fiber cable in tel ecommunication networks. within an optical window, the signals benefit from a lower impact on quality (less dispersion) and less attenuation per unit of fiber length. the range between 1000nm and 1300nm, called the second optical window, is known for low d ispersion - as low as 0db. the range from 1500nm to 1800nm, known as the third optical window, offers the lowest attenuation per unit of fiber length ( figure 3 ).
www.maxim - ic.com/AN649 page 6 of 11 figure 3. variations of attenuation and dispersion vs. wavelength for the first, second, and third optical windows. several optical sources are available for today's optical transmission systems. light - emitting diodes (leds), for example, are often used f or low - cost, short - distance local area network (lan) connections. disadvantages, however, preclude use of the led as a transmitter for telecommunications systems: its broad spectral bandwidth allows the coexistence of many optical modes, and it cannot oper ate at wavelengths of the second and third optical windows. unlike the led, the optical - modulated laser transmitter (the electro - absorption and mach - zehnder types, for instance) is an optical source with high spectral purity that can operate in the
www.maxim - ic.com/AN649 page 7 of 11 third o ptical window. it is preferred, therefore, for ultra - long - distance or wdm transmission systems in which high performance is mandatory and cost is not a major consideration. for optical links in the majority of telecommunication trunk lines, various types o f direct - modulated semiconductor laser diode offer an optimum cost/performance ratio for short, intermediate, and long - haul transmissions. devices are available for operation in both the second and third optical windows. all semiconductor laser diodes used for direct modulation have in common the need for a dc - bias current to set the operating point and a modulation current for signal transmission. the values for dc - bias and modulation current depend on characteristics of the laser diode, which can differ f rom type to type and version to version. the drift of these characteristics with time and temperature should be evaluated carefully when designing a transmitter unit, especially with regard to the more cost - effective, uncooled types of semiconductor laser. the laser driver must therefore offer bias and modulation currents with sufficient range to support the development of optical transmitters with a wide choice of laser diodes. to compensate for the drift of laser characteristics over time and temperature, the laser driver must maintain the initially adjusted dc operating point. the best way to realize this compensation is to introduce automatic power control (apc). to detect the actual laser power, a photodiode converts the laser light to a proportional cu rrent and feeds it to the laser driver, where the actual value is compared with a previous fixed value. any difference causes the dc - bias current to increase or decrease as required to reach the initially defined laser power. often, the apc includes an ala rm function that warns if the laser diode's optical power can no longer be sustained due to aging. like the operating point, optical signal strength is affected by the drift of laser - diode characteristics over time and temperature. to maintain the optical "amplitude," it is necessary to compensate for a decreasing slope in these characteristics caused by time and temperature. the problem is solved either with additional external circuitry or with an integrated automatic modulation control (amc), which may e mploy the photodiode already present in the apc loop. in addition to these fundamental functions, the system must be capable of stopping laser transmissions by disabling the driver without interrupting data reception at the input. by adding a flip - flop or latch (as part of the laser driver or the serializer), jitter performance can be improved by retiming this data stream before it reaches the laser driver's output stage. residing between the laser - diode driver and the lower - speed cmos system components, th e serializer converts parallel data to a serial stream for the laser driver. like the receiver unit's deserializer, the serializer's conversion ratio depends on the transmission bit rate and the speed of the cmos system interface. the retiming and serializ ation function requires a transmission clock, which must to be synthesized. this clock synthesizer can be integrated with the serializer, and usually incorporates a pll. the challenge for the synthesizer is to ensure data transmission with the lowest possi ble jitter. as a result, the synthesizer plays a key role in the transmitter of an optical transmission system. complete chipset for stm 4 rx/tx units all components of an optical transmission system for telecommunications must comply with the relevant it u - t recommendations. provided this basic requirement is met, the next most
www.maxim - ic.com/AN649 page 8 of 11 important criteria in designing an o/e unit are power dissipation, supply voltage, integration level, and margin of performance. the following section describes a complete chipset t hat allows designers to optimize the above criteria while developing competitive stm 4 receiver/transmitter units ( figures 4 and 5 ). figure 4. three packages f rom maxim form an stm 4 receiver. figure 5. two packages from maxim form an stm 4 transmitter. the chipset is based on maxim's state - of - the - art, high - perform ance bipolar technologies: cb - 2 and gst - 2. cb - 2 is a fast, complementary - bipolar process whose transit frequencies are 6.4ghz for pnp transistors and 8.7ghz for npn transistors. gst - 2 is a very - high - speed, submicron bipolar process with a transit frequency of 27ghz for npn transistors. the combination of modern high - performance manufacturing and extensive ic design experience has produced a highly integrated, flexible, and powerful stm 4 chipset consisting of five ics including the serializer and deserializ er. in serial - i/o modules the chipset consists of only three ics, and they can be delivered in die form to accommodate "chip - on - board" mounting technology.
www.maxim - ic.com/AN649 page 9 of 11 power dissipation is an important consideration because system cooling requirements usually allow on ly a limited power budget in the o/e units. maxim's stm 4 chipset makes extensive use of 27ghz, high - speed technology in reducing power dissipation. it can further reduce power dissipation by operating on +3.3v instead of today's more common +5v. rather th an require an additional source of +5v, the o/e unit can use the +3.3v available for cmos system components. or, to be flexible, it can share an existing +5v supply with the front - end ics. in addition to these features, which pertain to the chipset as a wh ole, features specific to the individual components are described in the following sections. preamplifier (i.e., transimpedance amplifier) the transimpedance amplifier (max3664) converts a single - ended current from the detector diode to a single - ended volt age, which is amplified and converted to a differential signal. typical amplification is 6k w . this gain level can be increased by 6db if the data outputs (back - terminated internally with 60 w ) are not externally terminated as well. for input currents beyond 100ap - p, the high gain leads to a limited differential output - voltage swing of 900mvp - p. a dc - cancellation circuit helps to deliver differential output voltages with low pulse - width distortion over a wide range of input - current levels. low input - related noise is achieved by careful circuit design and by limiting the bandwidth to 590mhz at an input capacitance of 1.1pf. assuming a simple pin detector diode is used, the low noise enables a typical input sensitivity of - 32dbm optical power. power dissipation is less than 85mw at +3.3v. small size and an optimal bondpad configuration make this component suitable for use in pin - tia modules, which combine a pin diode and transimpedance amplifier in one package (a to package, for instance). clock and data recover y (cdr) the main functions of the clock and data recovery ic (max3675) are to recover the clock signal from the received data stream and to regenerate the data's timing and amplitude characteristics. because the chip integrates an offset - compensated limiti ng amplifier as well, two standard products (max3664 and max3675) contain all the electronics necessary for an o/e receiver unit. the max3675 offers a high - sensitivity differential analog input (3mvp - p) and a differential pecl digital input, providing flex ibility that supports a wide range of receiver applications. the max3675's power dissipation depends on the input in use: 215mw with analog inputs, or 155mw with digital inputs. total power consumption for a complete receiver based on the max3664 and max36 75 is less than 300mw at +3.3v. an lop alarm function and input - power detector are integrated with the limiting amplifier. the lop alarm warns if the input signal falls below a user - defined threshold. the reference for this threshold is an internal bandgap circuit that is independent of the supply voltage. to ensure chatter - free operation for input signals near the threshold, the lop's ttl - monitor output includes hysteresis. the power detector provides a receive signal - strength indicator (rssi pin) whose ou tput voltage is proportional to input power and is linear in decibels. the pll necessary for clock recovery is fully integrated and does not require an external reference clock. it consists of a phase/frequency detector, a loop - filter amplifier with extern al rc network, and a 622mhz voltage - controlled oscillator. the pll provides an lol signal
www.maxim - ic.com/AN649 page 10 of 11 (lol pin) and a ttl - monitor output that flags when the pll loses lock. to improve the system's bit error rate as described in the optical receivers section, users can adjust clock phase relative to the data signal by accessing the pins phadj+ and phadj - . finally, a decision circuit supported by the recovered clock signal (from the pll) regenerates timing and amplitude characteristics for the incoming data stream. deseri alizers (demux) to support the various cmos system - interface circuits available today, maxim offers the max3680 and max3681 deserializers. the max3680 converts a 622mbps serial data stream to a 78mbps stream of 8 - bit words. data and clock outputs are ttl c ompatible, and the power consumption is 165mw at +3.3v. the max3681 converts a 622mbps serial data stream to a 155mbps stream of 4 - bit words. its differential data and clock outputs support an lvds interface for cmos system components, and its power consum ption is 265mw at +3.3v. both parts offer serial differential - pecl inputs for data and clock, and a synchronization function (sync pin) that enables a bit realignment of the deserializer's data outputs. serializer (mux) the max3691 serializer converts four lvds data streams at 155mbps to a serial stream at 622mbps. the necessary transmission clock is synthesized using a fully integrated pll comprising a voltage - controlled oscillator, a loop - filter amplifier, and a phase/frequency detector that requires only an external reference clock. all the data - and clock - input buffers are lvds - compatible, and the serial data output delivers differential - pecl signals. power dissipation is 215mw at +3.3v. laser driver (ld) the main task of the laser driver (max3667) is to deliver the bias (i bias ) and modulation current (i mod ) for a direct - modulated laser diode. for flexibility, the differential inputs accept pecl data streams and also differential voltage swings as small as 320mvp - p, with dc levels in the range 1v to (v cc - 0.75v). connecting an external resistor between biasset and ground lets you adjust the bias current between 5ma and 90ma, and a resistor between modset and ground lets you adjust the modulation current between 5ma and 60ma. an integrated, temperature - sta bilized reference voltage ensures stable bias and modulation currents. to avoid laser damage, a protection circuit disables the max3667 when any of the pins biasset, modset, or apcset are short - circuited to ground. to avoid excessive current that could alt er the laser's performance, an internal circuit also limits the sum of output currents i mod and i bias to approximately 150ma. as described in the optical transmitter section, an integrated apc circuit, supported by an external detector diode, maintains the initial user - defined average laser power constant over time and temperature. the detector diode's average current value is established by applying an external resistor between the apcset and gnd pins. two monitor outputs (biasmon and modmon) deliver outpu t currents directly proportional to the bias and modulation currents. the bias, modulation, and apcset currents can be disabled via the disable pin, but all other functions including the reference voltage remain active to allow a fast and predictable wake - up. in addition, an integrated slow - start function provides a 50ns minimum turn - on time that reduces laser stress. in contrast to other laser drivers available in today's market, the max3667 can operate from a single +3.3v supply.
www.maxim - ic.com/AN649 page 11 of 11 as an alternative to the 622mbps max3667, the max3766 laser driver can be used for stm 4 transmitter units supporting data rates from 155mbps to 1.25gbps. designed to operate on a single +5v supply, the max3766 incorporates all attributes mentioned for the max3667 plus the larger bandwidth (to 1.25gbps). other features include extensive laser - safety provisions and the option to add a single external resistor that maintains "optical amplitude" by compensating for the effect of temperature on the slope of the characteristic laser cur ve. the resistor's value depends on the laser diode's temperature characteristic. more information max3664: quickview -- full (pdf) data sheet (248k) max3667: quickview -- full (pdf) data sheet (648k) -- free sample max3675: quickview -- full (pdf) data shee t (568k) -- free sample max3681: quickview -- full (pdf) data sheet (64k) -- free sample max3691: quickview -- full (pdf) data sheet (90k) -- free sample

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